The customer-requirements (WHATs) Source column was plain text ("product
§UX", "README v0.8"). Replace with anchored Markdown links into the
product spec, README, and roadmap so each requirement's provenance is
one click away.
Adds a companion-docs header and inline ADR jumps on every load-bearing
choice (ADR-001 runtime, ADR-002 UI, ADR-004 git kill-switch, ADR-006
concurrency, ADR-007 storage, ADR-009 USB-host gate). Render module
also points at qfd §3 to anchor "why these functions rank top."
Adds a "Companion docs" header (README, technical, ADR, QFD, roadmap)
and inline pointers from the auth section to ADR-005, the screen
layout to ADR-003, and the acceptance criteria block to qfd §6 — so
each "what must this do" claim has a one-click jump to its rationale
or target.
Adds inline pointers from ADR-007 (storage) to the v0.1 technical
persistence + file-layout sections, from ADR-008 (power) to the v0.1
out-of-scope and roadmap v0.8, and from ADR-009 (keyboard) to spike 4
in the v0.1 technical bring-up order.
Adds a "Related docs" header at the top of adr.md and inline "See also"
pointers from ADR-001 (binary/build tradeoffs → qfd §7) and ADR-002
(render module → v0.1 technical, top H1/H2 functions → qfd §3). Makes
the design-doc set walkable instead of a flat list.
Macro-plan dates start 2026-06-01 with `after` dependencies between
versions. Per-version checklists move to docs/roadmap.md so the README
stays synthetic.
Translates user-facing requirements (the WHATs) into engineering
functions (the HOWs) and components, with a House-of-Quality matrix,
roof tradeoffs, function→component mapping (anchored to ADRs), and a
critical performance budget keyed to upcoming spikes. Cross-references
adr.md throughout.
Prior text said "~40 KB of stack space"; the v0.1 technical design's
task table sums to 76 KB (usb 8 + wifi 8 + ui 16 + render 12 + git 32).
Also widens the std::thread stack-cost note from a flat 8 KB to 8–32 KB
to match the per-task budget. No design change — 76 KB still fits
comfortably in the ESP32-S3's 512 KB internal SRAM.
Strip-aspect 5.79" panel (792×272) replaces the page-shaped 7.5" choice.
Reflows the v0.1 screen layout, framebuffer memory budget, and spike 2
acceptance to validate the SSD1683-class controller path or fall back to
a ~300 LoC custom embedded-hal driver.
