docs(sd): record Spike 3 hardware verification and findings
Mark Spike 3 resolved (genuine 32 GB SDHC mounts, round-trips clean on the shared SPI2 bus; the 133 GB SDXC's CMD59 rejection was the sole fault). Capture the FatFS f_rename caveat and the ≤32 GB card-compatibility note in ADR-007, the resolution in the postmortem, and the verified writeup in the firmware README.
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@@ -66,6 +66,30 @@ of it. `sdkconfig.defaults` gains the full certificate bundle and a bigger main
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task stack for the mbedtls handshake — a one-time esp-idf reconfigure on the
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next build.
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**Spike 3 — SD card (FAT) on shared SPI2: verified 2026-07-11.** A separate
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binary — [`src/bin/sd_fat.rs`](src/bin/sd_fat.rs), flashed with `just flash-sd` —
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brings up the SD card on the EPD's SPI2 bus, mounts FAT at `/sd`, and exercises
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the persistence module's atomic save (write `*.tmp` → fsync → rename →
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read-back). Wiring: **SCK 12 · MOSI 11** (shared with the EPD) **· MISO 13**
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(new; the write-only EPD never used it) **· SD CS 10** (EPD CS is 7).
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Bench result (genuine 32 GB SDHC card): mounts at 10 MHz, `29806 MiB total`,
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atomic round-trip byte-identical. Two findings baked into the code:
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- **Card compatibility.** A 133 GB SDXC card failed init at `CMD59` (SPI-mode
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CRC); a genuine ≤32 GB card works. We keep CRC required and reject bad cards
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with a swap-the-card message rather than run over an unchecked bus. See the
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[Spike 3 postmortem](../docs/postmortems/2026-07-05-spike3-sd-cmd59.md).
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- **FatFS rename ≠ POSIX rename.** `f_rename` won't overwrite an existing
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target (returns `FR_EXIST`), so the atomic save unlinks the destination first;
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the real persistence module must add `*.tmp` boot-recovery. Long filenames
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(`CONFIG_FATFS_LFN_HEAP`) are required for the two-dot `*.md.tmp` name.
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Still open before persistence lands in `main.rs`: the **shared-bus arbitration**
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question — the EPD driver holds an exclusive SPI2 lock for its lifetime, so the
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EPD and an arbitrated SD device can't both be live on one host yet (release/
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re-acquire around EPD ops, or give the SD its own SPI3). This spike ran SD-only.
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**Spike 5 — partial refresh + typing: verified 2026-07-04.** `main.rs` wires
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the keyboard to the panel: [`src/usb_kbd.rs`](src/usb_kbd.rs) feeds decoded
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key-downs (US layout, edge-detected) into a queue, and the main loop keeps a
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@@ -118,8 +142,8 @@ reseat the jumpers (CS first) before debugging code.
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Next up per
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[`docs/v0.1-mvp-technical.md`](../docs/v0.1-mvp-technical.md#hardware-bring-up-order):
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Wi-Fi/TLS (Spike 6, implemented above), then gitoxide push (Spike 7); SD is
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deferred.
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Wi-Fi/TLS (Spike 6, implemented above), then git push (Spike 7), then SD
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(Spike 3) — all verified.
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**Spike 1 — Blink: verified 2026-07-04.** GPIO 2 + on-board WS2812 toggled
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at 1 Hz with `blink N` on USB-serial, proving toolchain, esp-idf link, and
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